IC/ASIC/Digital Design Engineer – All Levels, San Diego

IC/ASIC/Digital Design Engineer – All Levels, San Diego2019-07-22T10:37:39+00:00

IC/ASIC/Digital Design Engineer – All Levels

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Duties and Responsibilities

  • Responsible for successful completion and timely execution of all activities related to design of digital logic of Endura IP.
  • Front-end design efforts including design specifications, RTL development, functional verification, synthesis, DFT, STA.
  • Designing of clock and power management controllers and auxiliary circuits for Endura IP.
  • Support customers with IP integration and IP delivery.

Skills and Specifications

  • Hands-on experience with front-end design up to synthesis and STA is a must.
  • Familiarity with high-speed digital design is desired.
  • Familiarity with digital filter and DSP algorithms is desired
  • Knowledge of adaptive control theory is highly desirable
  • Familiarity with FPGA development is a plus
  • Familiarity with analog and mixed-mode design is a plus
  • Experience with generation and validation of silicon IP releases, with relevant functional, timing, and test views.
  • Excellent documentation, verbal and written communication skills
  • Excellent organization skills and ability to manage time well

Education and Qualifications

  • 5 to 15 years of professional experience in digital design or relevant technical field.
  • Equivalent of Bachelor of Science Engineering Degree (Master’s degree or higher preferred)